6. Debug¶
6.1. Debug Overview¶
In this specification, the word ‘trace’ is used for any message that is generated by BIOS components for debug purposes. These typically include postcodes, status codes and string messages.
The general philosophy is to provide a simple and ubiquitous solution that supports a range of debug solutions to help with BIOS debug and tracing needs.
6.1.1. Requirements¶
This section summarizes a set of requirements to ensure common debug and trace features are supported by all modules.
6.1.1.1. Trace interfaces¶
BIOS shall support sending trace messages to all BIOS accessible HW interfaces on the platform.
BIOS shall support enabling and disabling the trace interfaces individually.
BIOS modules don’t control which trace output is used.
SAL layer shall implement a middleware trace class which routes the messages to enabled interfaces such as NPK or UART. Enabled trace interfaces may be selected at build time but run time selection is preferred.
Enabled trace interfaces shall be initialized once before the first trace message is sent.
6.1.1.2. Trace data¶
BIOS trace to NPK shall follow MIPI Sys-T specification catalog format and BIOS error levels shall comply to Sys-T definition matching verbosity level definition at bit level.
BIOS build shall output a catalog dictionary file for decoding the trace.
Generating the dictionary file shall not exceed BIOS build time requirements.
BIOS module trace shall comply to Intel Trace Specification. <provide link if available>
BIOS shall support both build time and boot time trace verbosity filtering.
Enabling BIOS trace feature shall meet release build binary size and performance requirements.